The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 19, 2016

Filed:

Nov. 12, 2012
Applicant:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Inventors:

Kelvin D. Goveas, Austin, TX (US);

Debjit Das Sarma, San Jose, CA (US);

Scott A. Hilker, San Jose, CA (US);

Hanbing Liu, Austin, TX (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/483 (2006.01); G06F 7/499 (2006.01); G06F 7/544 (2006.01);
U.S. Cl.
CPC ...
G06F 7/483 (2013.01); G06F 7/49936 (2013.01); G06F 7/5443 (2013.01);
Abstract

The present application provides a method and apparatus for supporting denormal numbers in a floating point multiply-add unit (FMAC). One embodiment of the FMAC is configurable to add a product of first and second operands to a third operand. This embodiment of the FMAC is configurable to determine a minimum exponent shift for a sum of the product and the third operand by subtracting a minimum normal exponent from a product exponent of the product. This embodiment of the FMAC is also configurable to cause bits representing the sum to be left shifted by the minimum exponent shift if a third exponent of the third operand is less than or equal to the product exponent and the minimum exponent shift is less than or equal to a predicted left shift for the sum.


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