The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 12, 2016
Filed:
Apr. 23, 2015
Applicant:
Phison Electronics Corp., Miaoli, TW;
Inventors:
Wei Lin, Taipei, TW;
Yu-Cheng Hsu, Yilan County, TW;
An-Cheng Liu, Taipei, TW;
Siu-Tung Lam, Hsinchu, TW;
Assignee:
PHISON ELECTRONICS CORP., Miaoli, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 16/14 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G11C 16/14 (2013.01); G11C 16/3445 (2013.01); G11C 16/3495 (2013.01);
Abstract
A configuration method of erase operation, a memory controlling circuit unit, and a memory storage device are provided. The method includes: determining whether a first use state of a first physical unit conforms to a first default state; and if the first use state conforms to the first default state, adjusting a first erase operation corresponding to the first physical unit from using a first mode to a second mode. Thereby, a threshold voltage distribution of memory cells in an erase state may be maintained in a proper range.