The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 12, 2016
Filed:
Aug. 09, 2012
Akihisa Iwamoto, Osaka, JP;
Hideki Morii, Osaka, JP;
Takayuki Mizunaga, Osaka, JP;
Kazuya Nakaminami, Osaka, JP;
Satoshi Horiuchi, Osaka, JP;
Akihisa Iwamoto, Osaka, JP;
Hideki Morii, Osaka, JP;
Takayuki Mizunaga, Osaka, JP;
Kazuya Nakaminami, Osaka, JP;
Satoshi Horiuchi, Osaka, JP;
Sharp Kabushiki Kaisha, Osaka, JP;
Abstract
Provided are: a liquid crystal display device capable of rapidly removing residual electric charges in a panel when a power supply is turned off, and in particular, suitable for a case where IGZO-GDM is adopted; and a driving method of the liquid crystal display device. In the liquid crystal display device, when an OFF state of the power supply is detected, a power supply OFF sequence including an initialization step, a first discharge step and a second discharge step is executed. In the initialization step, only a clear signal (H_CLR) among GDM signals is set at a high level, and a state of each of bistable circuits which constitute a shift register is initialized. In the first discharge step, only the clear signal (H_CLR) among the GDM signals is set at a low level, all of gate bus lines are turned to a selected state, and electric charges in pixel formation portions are discharged. In the second discharge step, the clear signal (H_CLR) is set at the high level, and electric charges on floating nodes in each of the bistable circuits are discharged.