The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9311743 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 12, 2016

Filed:

Oct. 23, 2013
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Tao Wang, Sunnyvale, CA (US);

Andrew Evan Gruber, Arlington, MA (US);

Shambhoo Khandelwal, Santa Clara, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06T 15/40 (2011.01); G06T 15/00 (2011.01); G06T 1/60 (2006.01);
U.S. Cl.
CPC ...
G06T 15/405 (2013.01); G06T 1/60 (2013.01); G06T 15/005 (2013.01);
Abstract

This disclosure describes techniques for performing hierarchical z-culling in a graphics processing system. In some examples, the techniques for performing hierarchical z-culling may involve selectively merging partially-covered source tiles for a tile location into a fully-covered merged source tile based on whether conservative farthest z-values for the partially-covered source tiles are nearer than a culling z-value for the tile location, and using a conservative farthest z-value associated with the fully-covered merged source tile to update the culling z-value for the tile location. In further examples, the techniques for performing hierarchical z-culling may use a cache unit that is not associated with an underlying memory to store conservative farthest z-values and coverage masks for merged source tiles. The capacity of the cache unit may be smaller than the size of cache needed to store merged source tile data for all of the tile locations in a render target.


Find Patent Forward Citations

Wang, Tao. (2016). Selectively merging partially-covered tiles to perform hierarchical z-culling (U.S. Patent No. 9311743). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9311743

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