The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9311142 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 12, 2016

Filed:

Aug. 08, 2012
Applicants:

Koichiro Yamashita, Kawasaki, JP;

Hiromasa Yamauchi, Kawasaki, JP;

Kiyoshi Miyazaki, Kawasaki, JP;

Inventors:

Koichiro Yamashita, Kawasaki, JP;

Hiromasa Yamauchi, Kawasaki, JP;

Kiyoshi Miyazaki, Kawasaki, JP;

Assignee:

FUJITSU LIMITED, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/50 (2006.01); G06F 9/48 (2006.01); G06F 13/18 (2006.01); G06F 13/26 (2006.01); G06F 13/16 (2006.01); G06F 9/52 (2006.01); G06F 9/445 (2006.01);
U.S. Cl.
CPC ...
G06F 9/4881 (2013.01); G06F 9/52 (2013.01); G06F 9/44552 (2013.01); G06F 13/1652 (2013.01); G06F 13/18 (2013.01); G06F 13/26 (2013.01);
Abstract

A multi-core processor system includes multiple cores and memory accessible from the cores, where a given core is configured to detect among the cores, first cores having a highest execution priority level; identify among the detected first cores, a second core that caused access conflict of the memory; and control a third core that is among the cores, excluding the first cores and the identified second core, the third core being controlled to execute for a given interval during an interval when the access conflict occurs, a thread that does not access the memory.


Find Patent Forward Citations

Yamashita, Koichiro. (2016). Controlling memory access conflict of threads on multi-core processor with set of highest priority processor cores based on a threshold value of issued-instruction efficiency (U.S. Patent No. 9311142). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9311142

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