The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 12, 2016
Filed:
Feb. 11, 2013
Applicant:
Stmicroelectronics (Research & Development) Limited, Marlow, Buckinghamshire, GB;
Inventor:
David Smith, Bristol, GB;
Assignee:
STMicroelectronics (Research & Development) Limited, Marlow, GB;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2006.01); G06F 9/38 (2006.01);
U.S. Cl.
CPC ...
G06F 9/3885 (2013.01); G06F 9/3001 (2013.01); G06F 9/30145 (2013.01); G06F 9/3853 (2013.01); G06F 9/3875 (2013.01);
Abstract
An arrangement of at least two arithmetic logic units carries out an operation defined by a decoded instruction including at least one operand and more than one operation code. The operation codes and at least one operand are received and corresponding executions are performed by the arithmetic logic units on a single clock cycle. The result of the execution from one arithmetic logic unit is used as an operand by a further arithmetic logic unit. The decoding of the instruction is performed in an immediately preceding single clock cycle.