The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 12, 2016

Filed:

Feb. 07, 2014
Applicant:

Dialog Semiconductor Gmbh, Kirchheim/Teck-Nabem, DE;

Inventor:

Slawomir Malinowski, Graz-Seiersberg, AT;

Assignee:

Dialog Semiconductor GmbH, Kirchheim/Teck-Nabern, DE;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G05F 3/02 (2006.01); G05F 3/26 (2006.01); G01R 19/00 (2006.01);
U.S. Cl.
CPC ...
G05F 3/262 (2013.01); G05F 3/02 (2013.01); G05F 3/26 (2013.01); G01R 19/0092 (2013.01);
Abstract

The present document relates to voltage mirror circuits. A voltage mirror circuit, having an input node and an output node is configured to provide substantially equal voltage levels at the input node and the output node. The voltage mirror circuit comprises an input current source transistor, an input gain transistor arranged in series with the input current source transistor such that the input gain transistor is traversed by the bias current, wherein the voltage level at the input node corresponds to the voltage drop across the input current source transistor and the input gain transistor. An intermediate gain transistor forms a first current mirror with the input gain transistor. An output current source transistor forms a second current mirror with the intermediate current source transistor. An output gain transistor is wherein the voltage level at the output node corresponds to the voltage drop across the output current source transistor and the output gain transistor.


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