The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 12, 2016

Filed:

Jan. 28, 2014
Applicant:

Omnivision Technologies, Inc., Santa Clara, CA (US);

Inventors:

Jenny Picalausa, Hakadal, NO;

Kristoffer Koch, Oslo, NO;

Assignee:

OmniVision Technologies, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/317 (2006.01); G01R 31/3187 (2006.01); G01R 31/3185 (2006.01); G06F 11/22 (2006.01); G06F 11/277 (2006.01); G01R 31/3193 (2006.01); G01R 31/3177 (2006.01); G01R 31/3183 (2006.01); G01R 31/3181 (2006.01); G06F 13/24 (2006.01); G06F 11/26 (2006.01); H04L 12/26 (2006.01);
U.S. Cl.
CPC ...
G01R 31/318544 (2013.01); G01R 31/3177 (2013.01); G01R 31/3187 (2013.01); G01R 31/31703 (2013.01); G01R 31/31813 (2013.01); G01R 31/31932 (2013.01); G01R 31/31935 (2013.01); G01R 31/318385 (2013.01); G01R 31/318547 (2013.01); G01R 31/318555 (2013.01); G06F 11/2236 (2013.01); G06F 11/261 (2013.01); G06F 11/277 (2013.01); G06F 13/24 (2013.01); H04L 43/50 (2013.01);
Abstract

A system has in an integrated circuit a seed memory coupled to seed a vector generator that provides a vector to at least one scan chain of a first functional unit. A signature generator is configured to generate a signature from scan chain data, the signature is compared to an expected signature in a signature memory. A state memorizer is provided for saving a state of the functional unit and to restore the state of the functional unit as testing is completed. The system also has apparatus configured to determine an idle condition of the functional unit despite a non-idle state of the system; and a control unit configured to operate a test sequence when the functional unit is idle, the test sequence saving a state of the unit, generating vectors and signatures and verifying the signatures, and restoring the state of the unit.


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