The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 2016

Filed:

Nov. 10, 2014
Applicant:

Ostendo Technologies, Inc., Carlsbad, CA (US);

Inventors:

Hussein S. El-Ghoroury, Carlsbad, CA (US);

Chih-Li Chuang, San Diego, CA (US);

Kameshwar Yadavalli, Carlsbad, CA (US);

Qian Fan, Carlsbad, CA (US);

Assignee:

Ostendo Technologies, Inc., Carlsbad, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 33/00 (2010.01); H01L 27/146 (2006.01); H01L 21/18 (2006.01);
U.S. Cl.
CPC ...
H01L 33/0079 (2013.01); H01L 21/187 (2013.01); H01L 27/14618 (2013.01); H01L 27/14683 (2013.01); H01L 33/0066 (2013.01); H01L 33/0095 (2013.01); H01L 2924/0002 (2013.01); H01L 2933/0066 (2013.01);
Abstract

Methods for bonding semiconductor wafers requiring the transfer of electrical and optical signals between the bonded wafers and across the bonding interface by interfusing optical interconnects on one wafer with optical interconnects on a second wafer, interfusing electrical interconnects on one wafer with electrical interconnects on the second wafer, and interfusing a dielectric intermediary bonding layer on one wafer with the dielectric intermediary bonding layer on the second wafer to bond the wafers together with electrical interconnections and optical interconnections between the wafers. The methods are also applicable to the bonding of semiconductor wafers to provide a high density of electrical interconnects between wafers.


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