The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 2016

Filed:

Jan. 23, 2014
Applicants:

Kong Bee Tiu, Port Klang, MY;

Ruzaini B. Ibrahim, Bandar Puncak Alam, MY;

Wen Shi Koh, Petaling Jaya, MY;

Inventors:

Kong Bee Tiu, Port Klang, MY;

Ruzaini B. Ibrahim, Bandar Puncak Alam, MY;

Wen Shi Koh, Petaling Jaya, MY;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/495 (2006.01);
U.S. Cl.
CPC ...
H01L 24/85 (2013.01); H01L 23/49527 (2013.01); H01L 23/49551 (2013.01); H01L 23/49558 (2013.01); H01L 23/49562 (2013.01); H01L 24/48 (2013.01); H01L 24/45 (2013.01); H01L 24/73 (2013.01); H01L 2224/05553 (2013.01); H01L 2224/291 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/45124 (2013.01); H01L 2224/45139 (2013.01); H01L 2224/45144 (2013.01); H01L 2224/45147 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/49109 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/85 (2013.01); H01L 2224/92247 (2013.01); H01L 2924/181 (2013.01); H01L 2924/19107 (2013.01);
Abstract

A semiconductor device includes a lead frame, and an integrated circuit die. The lead frame has a flag for supporting the die and leads that surround that flag and die. The lead frame also has ground ring that surrounds the flag and die. First bond wires electrically connect the die to the lead frame leads. An insulating layer is disposed on the ground ring, and a power layer is disposed on the insulating layer. The semiconductor device further includes second bond wires that connect the die to the ground ring and third bond wires that connect the die to the power layer.


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