The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 2016

Filed:

Oct. 06, 2014
Applicant:

Blackberry Limited, Waterloo, CA;

Inventors:

Ivoyl Koutsaroff, Hamilton, CA;

Mark Vandermeulen, Burlington, CA;

Andrew Cervin-Lawry, Oakville, CA;

Atin J. Patel, Mississauga, CA;

Assignee:

BlackBerry Limited, Waterloo, On, CA;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/20 (2006.01); H01G 4/38 (2006.01); H01G 4/33 (2006.01); H01L 27/01 (2006.01); H05K 1/16 (2006.01); H01G 13/04 (2006.01); H05K 1/03 (2006.01); H05K 3/38 (2006.01);
U.S. Cl.
CPC ...
H01G 4/38 (2013.01); H01G 4/33 (2013.01); H01G 13/04 (2013.01); H01L 27/016 (2013.01); H05K 1/162 (2013.01); H05K 1/0306 (2013.01); H05K 3/38 (2013.01); H05K 3/388 (2013.01); H05K 2201/0175 (2013.01); H05K 2201/0179 (2013.01); Y10T 29/49126 (2015.01); Y10T 29/49155 (2015.01);
Abstract

In accordance with the teachings described herein, a multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same are provided. The multi-level thin film capacitor (MLC) may include at least one high permittivity dielectric layer between at least two electrode layers, the electrode layers being formed from a conductive thin film material. A buffer layer may be included between the ceramic substrate and the thin film MLC. The buffer layer may have a smooth surface with a surface roughness (Ra) less than or equal to 0.08 micrometers (um).


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