Implementing simultaneous read and write operations utilizing dual port dram

Abstract

A method, system and memory controller are provided for implementing simultaneous read and write operations in a memory subsystem utilizing a dual port Dynamic Random Access Memory (DRAM) configuration. A DRAM includes a first partition and a second partition. A memory controller determines if memory requirements are above or below a usage threshold. If the memory requirements are below the usage threshold, the memory is partitioned into a read buffer and a write buffer, with writes going to the write buffer and reads coming from the read buffer, data being transferred from the write buffer to the read buffer through an Error Correction Code (ECC) engine. If the memory requirements are above the usage threshold, the entire memory is used for reads and writes.