The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 05, 2016
Filed:
Dec. 26, 2013
Xpliant, Inc., San Jose, CA (US);
Nikhil Jayakumar, Sunnyvale, CA (US);
Vivek Trivedi, Fremont, CA (US);
Vasant K. Palisetti, Santa Clara, CA (US);
Bhagavati R. Mula, San Jose, CA (US);
Daman Ahluwalia, Los Gatos, CA (US);
Amir H. Motamedi, Sunnyvale, CA (US);
Cavium, Inc., San Jose, CA (US);
Abstract
Clock networks constructed with variable drive strength clock drivers are prepared for tuning. The clock drivers are built from a smaller set of base standard cells. Locations of the input and output netlists of the macrocells are marked and reserved even through the extraction process. The macrocells are able to be flattened, generating a netlist with the base cells, and recombined during circuit simulation, thereby reducing the number of iterations, making the tuning flow more efficient. The clock network is initially tuned by adding or removing cross-links in the mesh to balance capacitive loads on each driver of the clock mesh.