The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 2016

Filed:

Mar. 29, 2012
Applicants:

Fong Pong, Mountain View, CA (US);

Eric Spada, Groton, MA (US);

Karen Schramm, Needham, MA (US);

Inventors:

Fong Pong, Mountain View, CA (US);

Eric Spada, Groton, MA (US);

Karen Schramm, Needham, MA (US);

Assignee:

Broadcom Corporation, Irvine, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/14 (2006.01); G06F 21/72 (2013.01); G06F 21/79 (2013.01);
U.S. Cl.
CPC ...
G06F 12/1441 (2013.01); G06F 12/1408 (2013.01); G06F 21/72 (2013.01); G06F 21/79 (2013.01); G06F 2211/007 (2013.01);
Abstract

A memory access circuit and a corresponding method are provided. The memory access circuit includes a crypto block in communication with a memory that encrypts data of a data block on a block basis. The memory access circuit also includes a fault injection block configured to inject faults to the data in the data block. The memory access circuit further includes a data scrambler and an address scrambler. The data scrambler is configured to scramble data in the memory by shuffling data bits within the data block in a plurality of rounds and mash the shuffled data bits with random data. The address scrambler is configured to distribute the scrambled data across the memory. A memory system including the memory access circuit is also disclosed to implement the corresponding method.


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