The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 29, 2016

Filed:

Dec. 04, 2013
Applicant:

Carnegie Mellon University, Pittsburgh, PA (US);

Inventors:

David M. Bromberg, Pittsburgh, PA (US);

Jian-Gang Zhu, Pittsburgh, PA (US);

Lawrence Pileggi, Pittsburgh, PA (US);

Vincent Sokalski, Pittsburgh, PA (US);

Matthew Moneck, Pittsburgh, PA (US);

Assignee:

Carnegie Mellon University, Pittsburgh, PA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/18 (2006.01); H03K 19/20 (2006.01); G11C 11/16 (2006.01); H01L 43/08 (2006.01);
U.S. Cl.
CPC ...
H03K 19/18 (2013.01); G11C 11/161 (2013.01); G11C 11/1673 (2013.01); G11C 11/1675 (2013.01); H01L 43/08 (2013.01); H03K 19/20 (2013.01);
Abstract

In one aspect, a nonvolatile magnetic logic device comprises an electrically insulating layer, a write path, and a read path. The write path comprises a plurality of write path terminals and a magnetic layer having a uniform magnetization direction that is indicative of a direction of magnetization of the magnetic layer in a steady state. A logic state is written to the nonvolatile magnetic logic device by passing a current through the plurality of write path terminals. The read path comprises a plurality of read path terminals for evaluation of the logic state. The electrically insulating layer promotes electrical isolation between the read path and the write path and magnetic coupling of the read path to the write path.


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