The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 29, 2016

Filed:

Jun. 10, 2015
Applicant:

Canon Kabushiki Kaisha, Tokyo, JP;

Inventors:

Masahiro Kobayashi, Tokyo, JP;

Takafumi Kishi, Yokohama, JP;

Yuichiro Yamashita, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H04N 5/355 (2011.01); H01L 31/02 (2006.01); H04N 5/369 (2011.01);
U.S. Cl.
CPC ...
H01L 27/14656 (2013.01); H01L 27/1461 (2013.01); H01L 27/1463 (2013.01); H01L 27/14607 (2013.01); H01L 27/14627 (2013.01); H01L 27/14641 (2013.01); H01L 27/14645 (2013.01); H01L 27/14654 (2013.01); H01L 27/14689 (2013.01); H01L 31/02 (2013.01); H04N 5/355 (2013.01); H04N 5/3559 (2013.01); H04N 5/369 (2013.01);
Abstract

In a photoelectric conversion apparatus that adds signals of a plurality of photoelectric conversion elements included in photoelectric conversion units, each of the plurality of photoelectric conversion elements includes a first semiconductor region of a first conductivity type that collects signal carriers. The first semiconductor regions included in photoelectric conversion elements that are included in each of the photoelectric conversion units and that are arranged adjacent to each other sandwich a second semiconductor region of a second conductivity type. A height of a potential barrier for the signal carriers generated in a certain region of the second semiconductor region is smaller than a height of a potential barrier for the signal carriers generated in a third semiconductor region between each of the first semiconductor regions and an overflow drain region of the first conductivity type.


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