The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 29, 2016

Filed:

Jun. 15, 2012
Applicants:

Wen-hsin Lin, Hsin-Chu, TW;

Ching-kun Lai, Hsin-Chu, TW;

Chien-hung Chen, Hsin-Chu, TW;

Inventors:

Wen-Hsin Lin, Hsin-Chu, TW;

Ching-Kun Lai, Hsin-Chu, TW;

Chien-Hung Chen, Hsin-Chu, TW;

Assignee:

AU OPTRONICS CORPORATION, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 3/36 (2006.01); H01J 9/24 (2006.01); H05K 3/00 (2006.01); H05K 3/34 (2006.01);
U.S. Cl.
CPC ...
H01J 9/241 (2013.01); H05K 3/0058 (2013.01); H05K 3/341 (2013.01); H05K 2201/10318 (2013.01); H05K 2201/10409 (2013.01); H05K 2203/167 (2013.01); Y02P 70/613 (2015.11); Y10T 29/4913 (2015.01); Y10T 29/49128 (2015.01);
Abstract

A method for manufacturing a printed circuit board is disclosed, which comprises the following steps. A basic board having an upper surface and a bottom surface opposite to the upper surface is provided. A plurality of the electronic components temporarily disposed on the basic board is provided. At least one locating pin temporarily disposed on a place of the basic board is provided, in which the electronic components are not temporarily disposed on the place. Surface mount technology is used simultaneously to joint at least one locating pin and the electronic components on the basic board.


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