The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 29, 2016
Filed:
Feb. 04, 2014
Applicant:
Kabushiki Kaisha Toshiba, Minato-ku, JP;
Inventors:
Assignee:
KABUSHIKI KAISHA TOSHIBA, Minato-ku, JP;
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 16/04 (2006.01); G11C 7/22 (2006.01); G11C 5/14 (2006.01); G11C 7/20 (2006.01); G11C 16/20 (2006.01);
U.S. Cl.
CPC ...
G11C 16/04 (2013.01); G11C 5/143 (2013.01); G11C 7/1006 (2013.01); G11C 7/1051 (2013.01); G11C 7/1063 (2013.01); G11C 7/1078 (2013.01); G11C 7/20 (2013.01); G11C 7/22 (2013.01); G11C 16/20 (2013.01); G11C 7/1072 (2013.01);
Abstract
One package contains a plurality of memory chips. Each memory chip has an I/O terminal which generates a busy signal. The busy signal enables a busy state when a power supply voltage value reaches a specified and guaranteed range after a power-on sequence. The busy signal maintains the busy state until completion of initialization operations for the plurality of memory chips. The busy signal releases the busy state after completion of all initialization operations for the plurality of memory chips.