The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 29, 2016

Filed:

Jul. 08, 2014
Applicant:

Mitsubishi Electric Corporation, Tokyo, JP;

Inventors:

Yuichi Masutani, Kumamoto, JP;

Katsuaki Murakami, Kumamoto, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1333 (2006.01); G02F 1/136 (2006.01); G02F 1/1362 (2006.01); G02F 1/13 (2006.01); G02F 1/1345 (2006.01); G09G 3/00 (2006.01); G09G 3/36 (2006.01);
U.S. Cl.
CPC ...
G02F 1/136286 (2013.01); G02F 1/1309 (2013.01); G02F 1/1345 (2013.01); G09G 3/006 (2013.01); G02F 2001/136254 (2013.01); G09G 3/3648 (2013.01);
Abstract

An array substrate has a plurality of gate signal lines, a plurality of source signal lines orthogonal to the plurality of gate signal lines, a plurality of gate-driver mounting terminals, a plurality of source-driver mounting terminals, a plurality of gate-side array inspection terminals connected to the gate signal lines, a plurality of source-side array inspection terminals connected to the source signal lines, a plurality of gate lead wire disconnection inspection circuits connected between the plurality of gate-driver mounting terminals and a common terminal for a gate lead wire disconnection inspection, and a plurality of source lead wire disconnection inspection circuits connected between the plurality of source-driver mounting terminals and a common terminal for a source lead wire disconnection inspection.


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