The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 22, 2016

Filed:

Nov. 06, 2014
Applicant:

Nokia Coproration, Espoo, FI;

Inventor:

Markus Nentwig, Helsinki, FI;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04W 28/26 (2009.01); H04J 11/00 (2006.01); H04W 52/24 (2009.01); H04W 72/08 (2009.01); H04W 72/00 (2009.01); H04L 1/00 (2006.01); H04W 28/04 (2009.01); H04W 52/26 (2009.01); H04W 52/36 (2009.01);
U.S. Cl.
CPC ...
H04W 28/26 (2013.01); H04J 11/0023 (2013.01); H04L 1/00 (2013.01); H04L 1/0003 (2013.01); H04L 1/0009 (2013.01); H04L 1/0015 (2013.01); H04W 52/243 (2013.01); H04W 52/245 (2013.01); H04W 72/005 (2013.01); H04W 72/082 (2013.01); H04W 28/04 (2013.01); H04W 52/242 (2013.01); H04W 52/247 (2013.01); H04W 52/262 (2013.01); H04W 52/367 (2013.01);
Abstract

An apparatus, system and method for providing interference cancellation and communication resource reservation limits to allocate communication resources in a communication system. In one embodiment, the apparatus includes a processor and memory including computer program code. The memory and the computer program code are configured, with the processor, to cause the apparatus to identify an interval of received signal power levels for interference cancellation of an interfering signal to a primary signal, and generate a message that provides the interval of received signal power levels for the interference cancellation of the interfering signal to the primary signal. In a related embodiment, the memory and the computer program code are configured, with the processor, to cause the apparatus to determine a communication resource reservation limit, and request an increase in the communication resource reservation limit.


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