The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 22, 2016

Filed:

Jan. 02, 2014
Applicant:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Inventors:

Mark Buckler, Acton, MA (US);

Wayne P. Burleson, Shutesbury, MA (US);

Srilatha Manne, Portland, OR (US);

Assignee:

ADVANCED MICRO DEVICES, INC., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04J 3/06 (2006.01); H04L 7/02 (2006.01); G06F 1/12 (2006.01); H04W 56/00 (2009.01); H04L 7/033 (2006.01);
U.S. Cl.
CPC ...
H04L 7/02 (2013.01); G06F 1/12 (2013.01); H04J 3/0602 (2013.01); H04J 3/0632 (2013.01); H04J 3/0638 (2013.01); H04J 3/0685 (2013.01); H04L 7/0331 (2013.01); H04W 56/001 (2013.01);
Abstract

A circuit includes a plurality of synchronizers to adapt a signal from a first clock domain to a second clock domain. Each synchronizer of the plurality of synchronizers includes a synchronizer input to receive the signal from the first clock domain and a synchronizer output to provide the signal as adapted to the second clock domain. The circuit also includes a multiplexer (mux) that includes a plurality of mux inputs and a mux output. Each mux input is coupled to the synchronizer output of a respective synchronizer of the plurality of synchronizers. The mux output provides the signal, as adapted to the second clock domain, from the synchronizer output of a selected synchronizer of the plurality of synchronizers.


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