The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 22, 2016
Filed:
Mar. 17, 2014
Sharp Kabushiki Kaisha, Osaka-shi, Osaka, JP;
Jun Nishimura, Osaka, JP;
Hideki Kitagawa, Osaka, JP;
Atsuhito Murai, Osaka, JP;
Hajime Imai, Osaka, JP;
Shinya Tanaka, Osaka, JP;
Mitsunori Imade, Osaka, JP;
Tetsuo Kikuchi, Osaka, JP;
Junya Shimada, Osaka, JP;
Kazunori Morimoto, Osaka, JP;
Sharp Kabushiki Kaisha, Osaka, JP;
Abstract
A source and drain electrode layer () of an oxide TFT element () is formed by a first conductive layer. A gate electrode () of the oxide TFT element () and a gate electrode () of an a-Si TFT element () are formed by a single conductive layer, that is, a second conductive layer. A source and drain electrode layer () of the a-Si TFT element () is formed by a third conductive layer. The third conductive layer is formed above the second conductive layer in a thickness direction in which each conductive layer is stacked on an insulating substrate (). Further, the first conductive layer is formed below the second conductive layer in the thickness direction. Therefore, it is possible to provide a circuit board that can have an improved degree of integration of transistor elements formed on the insulating substrate.