The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 22, 2016

Filed:

Jun. 02, 2010
Applicants:

Adam D. Fogle, San Jose, CA (US);

David S. Lehtonen, Austin, TX (US);

Richard Clark Blish, Ii, Seattle, WA (US);

Inventors:

Adam D. Fogle, San Jose, CA (US);

David S. Lehtonen, Austin, TX (US);

Richard Clark Blish, II, Seattle, WA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/28 (2006.01); H01L 23/552 (2006.01); H01L 23/29 (2006.01); H01L 23/544 (2006.01); H01L 23/00 (2006.01); H01L 27/115 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); H01L 23/295 (2013.01); H01L 23/544 (2013.01); H01L 24/16 (2013.01); H01L 27/11526 (2013.01); H01L 27/11573 (2013.01); H01L 2223/54406 (2013.01); H01L 2223/54433 (2013.01); H01L 2223/54486 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/01019 (2013.01); H01L 2924/14 (2013.01); H01L 2924/15311 (2013.01);
Abstract

An electronic device includes a packaged integrated circuit having an integrated circuit die having an active surface, and a molding compound overlaying the active surface of the integrated circuit die. In a particular embodiment, the packaged integrated circuit includes at least approximately five weight percent (5 wt %) zinc relative to the molding compound. In another embodiment, the packaged integrated circuit includes approximately 0.3 μmol/cmof zinc in an area parallel to the active surface of the integrated circuit die.


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