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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9293405 B1

PDFFull Text
Date of Patent:
Mar. 22, 2016

Filed:

Mar. 22, 2011

Semiconductor device

Applicants:

Shinji Baba, Kanagawa, JP;

Masaki Watanabe, Kanagawa, JP;

Muneharu Tokunaga, Kanagawa, JP;

Kazuyuki Nakagawa, Kanagawa, JP;

Inventors:

Shinji Baba, Kanagawa, JP;

Masaki Watanabe, Kanagawa, JP;

Muneharu Tokunaga, Kanagawa, JP;

Kazuyuki Nakagawa, Kanagawa, JP;

Assignee:

Renesas Electronics Corporation, Tokyo, JP;

Attorney:

Shapiro, Gabor and Rosenberger, PLLC

Primary Examiner:

Meiya Li

Assistant Examiner:

Peter M Albrecht

Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 23/498 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49816 (2013.01); H01L 21/563 (2013.01); H01L 23/49811 (2013.01); H01L 23/49827 (2013.01); H01L 24/14 (2013.01); H01L 23/49822 (2013.01); H01L 23/49838 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/81 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05548 (2013.01); H01L 2224/05567 (2013.01); H01L 2224/1134 (2013.01); H01L 2224/131 (2013.01); H01L 2224/13007 (2013.01); H01L 2224/13022 (2013.01); H01L 2224/13024 (2013.01); H01L 2224/13082 (2013.01); H01L 2224/13144 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/14136 (2013.01); H01L 2224/14155 (2013.01); H01L 2224/14177 (2013.01); H01L 2224/16237 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81191 (2013.01); H01L 2224/81193 (2013.01); H01L 2224/81815 (2013.01); H01L 2224/83102 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/3512 (2013.01);
Abstract

A technique capable of improving reliability of a semiconductor device is provided. In the present invention, as a wiring board on which a semiconductor chip is mounted, a build-up wiring board is not used but a through wiring board THWB is used. In this manner, in the present invention, the through wiring board formed of only a core layer is used, so that it is not required to consider a difference in thermal expansion coefficient between a build-up layer and the core layer, and besides, it is not required either to consider the electrical disconnection of a fine via formed in the build-up layer because the build-up layer does not exist. As a result, according to the present invention, the reliability of the semiconductor device can be improved while a cost is reduced.

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