The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 22, 2016

Filed:

Mar. 16, 2015
Applicant:

Renesas Electronics Corporation, Kawasaki, JP;

Inventors:

Akito Shimizu, Kawasaki, JP;

Kenji Nishikawa, Kawasaki, JP;

Sadayuki Moroi, Kawasaki, JP;

Tomoo Imura, Kawasaki, JP;

Assignee:

Renesas Electronics Corporation, Kawasaki-shi, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 23/495 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49503 (2013.01); H01L 21/56 (2013.01); H01L 21/561 (2013.01); H01L 21/563 (2013.01); H01L 23/3142 (2013.01); H01L 23/4952 (2013.01); H01L 23/49548 (2013.01); H01L 23/49551 (2013.01); H01L 23/49568 (2013.01); H01L 23/49579 (2013.01); H01L 24/97 (2013.01); H01L 23/3107 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/48257 (2013.01); H01L 2224/48465 (2013.01); H01L 2224/49109 (2013.01); H01L 2224/49171 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/78301 (2013.01); H01L 2224/97 (2013.01); H01L 2924/181 (2013.01);
Abstract

A method for manufacturing a semiconductor device, includes: (a) preparing a lead frame that includes a die pad having a first plane and a second plane located on the opposite side of the first plane, and a plurality of leads arranged next to the die pad; (b) mounting a semiconductor chip having a surface, a plurality of electrodes formed over the surface, and a reverse side located on the opposite side of the surface over a chip mounting area of the first plane of the die pad; (c) electrically coupling parts of the electrodes of the semiconductor chip and the leads through a plurality of first wires and electrically coupling the other parts of the electrodes and the die pad through a second wire.


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