The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 22, 2016

Filed:

Oct. 21, 2013
Applicant:

Qualcomm Mems Technologies, Inc., San Diego, CA (US);

Inventors:

Edward Keat Leem Chan, San Diego, CA (US);

Bing Wen, Poway, CA (US);

Cheonhong Kim, San Diego, CA (US);

Wilhelmus Johannes Robertus Van Lier, San Diego, CA (US);

Chih-Hsiang Ho, Lafayette, IN (US);

Rihui He, San Jose, CA (US);

Ming-Hau Tung, San Francisco, CA (US);

Alok Govil, Fremont, CA (US);

Jae Hyeong Seo, Pleasanton, CA (US);

Assignee:

QUALCOMM MEMS Technologies, Inc., San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/20 (2006.01); G09G 3/34 (2006.01);
U.S. Cl.
CPC ...
G09G 3/20 (2013.01); G09G 3/3466 (2013.01); G09G 2300/0404 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/08 (2013.01); G09G 2300/0823 (2013.01); G09G 2310/0256 (2013.01); G09G 2320/0247 (2013.01); G09G 2330/021 (2013.01);
Abstract

This disclosure provides systems, methods and apparatus for an arrangement of pixels and interconnects in a display. In one aspect, polarities of pixels may be in a dot inversion configuration, or checkerboard pattern, to reduce the visibility of flicker. Various interconnect alternatively couple between modules in different columns or rows to provide dot inversion.


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