The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 22, 2016
Filed:
Mar. 03, 2014
Chetan Verma, Noida, IN;
Amit Kumar Dey, Noida, IN;
Ashis Maitra, Bangalore, IN;
Kulbhushan Misri, Gurgaon, IN;
Amit Roy, Noida, IN;
Harkaran Singh, Amritsar, IN;
Vijay Tayal, Noida, IN;
Chetan Verma, Noida, IN;
Amit Kumar Dey, Noida, IN;
Ashis Maitra, Bangalore, IN;
Kulbhushan Misri, Gurgaon, IN;
Amit Roy, Noida, IN;
Harkaran Singh, Amritsar, IN;
Vijay Tayal, Noida, IN;
FREESCALE SEMICONDUCTOR, INC., Austin, TX (US);
Abstract
A method of physical design of an IC using an EDA tool includes identifying elements of the IC design that have excess positive timing slack. The excess timing slack elements are placed in a separate partition and then parameters of the characteristics of the excess timing slack elements are modified to reduce their excess timing slack, such as reducing the voltage supplied to the separate partition, thereby lowering power consumption of the IC design.