The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 15, 2016
Filed:
Dec. 15, 2013
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventor:
Gopalkrishna Ullal Nayak, Bangalore, IN;
Assignee:
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/42 (2006.01); H03K 19/003 (2006.01); G06F 1/10 (2006.01); H03K 5/13 (2014.01); H03K 5/135 (2006.01);
U.S. Cl.
CPC ...
H03K 19/003 (2013.01); G06F 1/10 (2013.01); G06F 13/4226 (2013.01); H03K 5/131 (2013.01); H03K 5/135 (2013.01);
Abstract
A data bus synchronizer includes a plurality of registers arranged in a cascade, configured to generate a synchronized output in response to sampling an asynchronous bus without an enable signal, where the plurality of registers receive a value on the asynchronous bus. A last register of the plurality of registers is configured to generate the synchronized output in response to a load enable signal. The data bus synchronizer further includes a logic block configured to generate the load enable signal on satisfaction of a logic condition.