The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 15, 2016

Filed:

Jun. 04, 2014
Applicant:

Onkyo Corporation, Osaka, JP;

Inventors:

Yoshinori Nakanishi, Osaka, JP;

Tsuyoshi Kawaguchi, Osaka, JP;

Mamoru Sekiya, Osaka, JP;

Assignee:

Onkyo Corporation, Neyagawa-shi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/02 (2006.01); H03K 19/00 (2006.01); H03K 19/21 (2006.01); H03M 3/00 (2006.01); H03K 19/0944 (2006.01); H04L 25/49 (2006.01);
U.S. Cl.
CPC ...
H03K 19/0002 (2013.01); H03K 19/09443 (2013.01); H03K 19/21 (2013.01); H03M 3/30 (2013.01); H04L 25/4923 (2013.01); H04L 25/4925 (2013.01);
Abstract

A circuit having versatility synthesizes one-bit digital signals to generate a ternary signal. The pulse synthesizing circuit synthesizes one-bit digital signals from two DFFs to generate a ternary signal. The pulse synthesizing circuit has a first NOR gate, a second NOR gate, a third NOR gate, and three switches. The first switch is connected to a first electric potential, the second switch is connected to a second electric potential, and the third switch is connected to a third electric potential. The first to third switches are turned on/off according to logical values of the signals from the two DFFs, and any of the first electric potential, the second electric potential, and the third electric potential is set as an output potential so that a ternary signal is generated.


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