The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 15, 2016

Filed:

Jul. 31, 2014
Applicant:

Cirrus Logic International (Uk) Ltd., Edinburgh, GB;

Inventors:

Jean Pierre Lasseuguette, Edinburgh, GB;

James Deas, Edinburgh, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04R 3/00 (2006.01); H03F 3/183 (2006.01); H03F 1/32 (2006.01); H03F 3/187 (2006.01); H03F 3/45 (2006.01); H04R 23/00 (2006.01); H03F 1/02 (2006.01); H03F 3/185 (2006.01); H04R 19/00 (2006.01); H04R 19/04 (2006.01);
U.S. Cl.
CPC ...
H03F 3/183 (2013.01); H03F 1/0266 (2013.01); H03F 1/3205 (2013.01); H03F 1/3211 (2013.01); H03F 3/185 (2013.01); H03F 3/187 (2013.01); H03F 3/45071 (2013.01); H03F 3/45183 (2013.01); H03F 3/45188 (2013.01); H03F 3/45197 (2013.01); H03F 3/45654 (2013.01); H04R 23/00 (2013.01); H03F 2003/45008 (2013.01); H03F 2200/03 (2013.01); H03F 2200/78 (2013.01); H03F 2203/45112 (2013.01); H03F 2203/45244 (2013.01); H03F 2203/45392 (2013.01); H03F 2203/45396 (2013.01); H03F 2203/45418 (2013.01); H03F 2203/45424 (2013.01); H03F 2203/45498 (2013.01); H03F 2203/45658 (2013.01); H04R 3/00 (2013.01); H04R 19/005 (2013.01); H04R 19/04 (2013.01); H04R 2201/003 (2013.01);
Abstract

Amplifier arrangements for read-out of MEMS capacitive transducers, such as low-noise amplifiers. An amplifier circuit has first and second MOS transistors, with the gate of the first transistor driven by the input signal, and the gate of the second transistor driven by a reference. The sources of the first and second transistors are connected via an impedance. Modulation circuitry is arranged to monitor a signal with a value that varies with the input signal and to modulate the back-bias voltage between the bulk and source terminals of the first and second transistors with the applied modulation being equal for each transistor and based on said monitored signal. The back-bias of the first transistor can be increase to extend the input range of the transistor in situations where the input signal may otherwise result in signal clipping, while avoiding noise and power issues for other input signal levels. By applying an equal modulation to the back-bias of each transistor, there is no substantial modulation of the output signal.


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