The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 15, 2016

Filed:

Mar. 22, 2011
Applicant:

Ming-che Wu, Nantou County, TW;

Inventor:

Ming-Che Wu, Nantou County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01); H01L 23/552 (2006.01); H01L 23/498 (2006.01); H01L 25/00 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); H01L 23/49805 (2013.01); H01L 25/50 (2013.01); H01L 23/3121 (2013.01); H01L 24/16 (2013.01); H01L 24/97 (2013.01); H01L 25/0655 (2013.01); H01L 2224/97 (2013.01); H01L 2924/157 (2013.01);
Abstract

A chip level EMI shielding structure and manufacture method thereof are provided. The chip level EMI shielding structure includes a semiconductor substrate, at least one ground conductor line, a ground layer, and a connection structure. The ground conductor line is disposed on a first surface of the semiconductor substrate, and the ground layer is disposed on a second surface of the semiconductor substrate. The connection structure is formed on a lateral wall of the semiconductor substrate for connecting the ground conductor lines with the ground layer to form a shielding. With such arrangement, the chip level EMI shielding structure can reduce the chip size and the manufacturing cost.


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