The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 15, 2016

Filed:

Jun. 26, 2013
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Gerhard Schmidt, Wernberg, AT;

Matthias Müller, Regensburg, DE;

Francisco Javier Santos Rodriguez, Villach, AT;

Daniel Schlögl, Villach, AT;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01); H01L 21/768 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76841 (2013.01); H01L 29/0615 (2013.01); H01L 29/0619 (2013.01);
Abstract

A power semiconductor device includes a semiconductor body, having an active zone and a high voltage peripheral zone laterally adjacent to each other, the high voltage peripheral zone laterally surrounding the active zone. The device further includes a metallization layer on a front surface of the semiconductor body and connected to the active zone, a first barrier layer, comprising a high-melting metal or a high-melting alloy, between the active zone and the metallization layer, and a second barrier layer covering at least a part of the peripheral zone, the second barrier layer comprising an amorphous semi-isolating material. The first barrier layer and the second barrier layer partially overlap and form an overlap zone. The overlap zone extends over an entire circumference of the active zone. A method for producing such a power semiconductor device is also provided.


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