The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 15, 2016

Filed:

Oct. 27, 2014
Applicants:

Paramjeet Singh, Delhi, IN;

Manmohan Rana, Ghaziabad, IN;

Inventors:

Paramjeet Singh, Delhi, IN;

Manmohan Rana, Ghaziabad, IN;

Assignee:

FREESCALE SEMICONDUCTOR,INC., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 17/00 (2006.01); G11C 17/08 (2006.01); G11C 17/12 (2006.01); G11C 17/16 (2006.01); G11C 11/56 (2006.01);
U.S. Cl.
CPC ...
G11C 17/08 (2013.01); G11C 17/12 (2013.01); G11C 17/126 (2013.01); G11C 17/16 (2013.01); G11C 11/5692 (2013.01);
Abstract

A memory array includes multiple memory cells, multiple bit lines, multiple word lines, and multiple source lines. Each memory cell includes a corresponding transistor and stores first and second data values. The transistor has corresponding first and second bit lines, and a source line for retrieving the first and second data values. The transistor has a gate terminal connected to a corresponding word line for receiving a word line enable signal, a first diffusion terminal connected to ground, and a second diffusion terminal connected to at least one of the corresponding first bit line, second bit line, and the source line for determining the first and second data values. The second diffusion terminal may be floating for determining the first and second data values.


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