The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 15, 2016
Filed:
Jan. 16, 2014
3dic memory chips including computational logic-in-memory for performing accelerated data processing
Carnegie Mellon University, Pittsburgh, PA (US);
Franz Franchetti, Pittsburgh, PA (US);
Qiuling Zhu, San Jose, CA (US);
Lawrence T. Pileggi, Pittsburgh, PA (US);
Carnegie Mellon University, Pittsburgh, PA (US);
Abstract
This disclosure relates to a three-dimensional (3D) integrated circuit (3DIC) memory chip including computational logic-in-memory (LiM) for performing accelerated data processing. Related memory systems and methods are also disclosed. In one embodiment, the 3DIC memory chip includes at least one memory layer that provides a primary memory configured to store data. The 3DIC memory chip also includes a computational LiM layer. The computational LiM layer is a type of memory layer having application-specific computational logic integrated into local memory while externally appearing as regular memory. The computational LiM layer and the primary memory are interconnected through through-silica vias (TSVs). In this manner, the computational LiM layer may load data from the primary memory with the 3DIC memory chip without having to access an external bus coupling the 3DIC memory chip to a central processing unit (CPU) or other processors to computationally process the data and generate a computational result.