The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 15, 2016

Filed:

Mar. 31, 2014
Applicant:

Emc Corporation, Hopkinton, MA (US);

Inventors:

Peter Puhov, Shrewsbury, MA (US);

Robert P. Foley, Clinton, MA (US);

Peter J. McCann, Mason, NH (US);

Assignee:

EMC Corporation, Hopkinton, MA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0655 (2013.01); G06F 3/061 (2013.01); G06F 3/0671 (2013.01);
Abstract

A technique for managing I/O operations in data storage systems having one or more multi-core processors is provided. A first variable stored in shared memory is configured to simultaneously store a counter associated with a number of I/O operations outstanding and a gate bit value associated with a gate condition. I/O operations are tracked by incrementing the counter value when an I/O operation is received and decrementing the counter value when an I/O operation is processed. If a storage object is identified as requiring a state change, the gate bit is set to queue any subsequent I/O operations. Outstanding I/O operations are drained by processing I/Os until the counter reaches zero. Any necessary operations are performed during the state change condition. The gate bit is cleared and I/O processing resumes. Atomic increment, decrement, OR and AND instructions provide synchronization across the multiple cores.


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