The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 15, 2016

Filed:

Sep. 20, 2013
Applicant:

The Regents of the University of California, Oakland, CA (US);

Inventors:

Jared Bauters, Santa Barbara, CA (US);

John E. Bowers, Santa Barbara, CA (US);

Jock Bovington, Goleta, CA (US);

Martijn Heck, Aarhus, DK;

Michael Davenport, Goleta, CA (US);

Daniel Blumenthal, Santa Barbara, CA (US);

Jonathon Scott Barton, Santa Barbara, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B 6/12 (2006.01); G02B 6/122 (2006.01); H01L 31/105 (2006.01); G02B 6/30 (2006.01); G02B 6/136 (2006.01); G02B 6/134 (2006.01);
U.S. Cl.
CPC ...
G02B 6/1225 (2013.01); G02B 6/1228 (2013.01); G02B 6/136 (2013.01); G02B 6/1347 (2013.01); G02B 6/305 (2013.01); H01L 31/105 (2013.01); G02B 2006/12176 (2013.01); G02B 2006/12188 (2013.01);
Abstract

A method for realizing a semiconductor waveguide and an ultra-low-loss dielectric waveguide disposed on the same substrate is disclosed. The method includes forming a partial dielectric waveguide structure on the substrate, wherein the dielectric waveguide is annealed to reduce hydrogen incorporation, and wherein the top cladding of the dielectric waveguide is only partially formed by a first dielectric layer. A second substrate comprising a semiconductor layer having a second dielectric layer disposed on its top surface is bonded to the first substrate such that the first and second dielectric layers collectively form the complete top cladding for the dielectric waveguide. The second substrate is then removed and the semiconductor layer is patterned to define the semiconductor waveguide core.


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