The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 08, 2016

Filed:

Dec. 13, 2012
Applicant:

Em Microelectronic-marin SA, Marin, CH;

Inventors:

Lubomir Plavec, Necin, CZ;

Yves Theoduloz, Yverdon, CH;

Petr Drechsler, Jesenice, CZ;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/017 (2006.01); H03K 5/13 (2014.01); H03K 7/08 (2006.01); H03L 5/00 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03K 3/017 (2013.01); H03K 5/133 (2013.01); H03K 7/08 (2013.01); H03L 5/00 (2013.01); H03K 2005/00032 (2013.01);
Abstract

The present invention concerns a signal generator circuit powered by a supply voltage and including flip flop means including a first input to which is connected a continuous input signal whose amplitude is defined, a second input to which is connected a clock signal whose duty cycle is defined, and a third, reset input, and outputting an output signal whose duty cycle is that of the clock signal and whose amplitude is that of the input signal, characterized in that said circuit further includes regulating means arranged to compare the output signal to a set point signal representative of the desired duty cycle and to deliver a control signal connected to the third input of the flip flop means so as to activate the reset to modify the duty cycle of the output signal.


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