The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 08, 2016

Filed:

Dec. 02, 2014
Applicant:

Aeroflex Colorado Springs Inc., Colorado Springs, CO (US);

Inventors:

Alfio Zanchi, Huntington Beach, CA (US);

Shinichi Hisano, Colorado Springs, CO (US);

Assignee:

Aeroflex Colorado Springs Inc., Colorado Springs, CO (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01); H03F 1/26 (2006.01); H03F 3/00 (2006.01); H03F 3/195 (2006.01);
U.S. Cl.
CPC ...
H03F 1/26 (2013.01); H03F 3/005 (2013.01); H03F 3/195 (2013.01); H03F 3/45076 (2013.01); H03F 3/45183 (2013.01); H03F 3/45659 (2013.01); H03F 2200/294 (2013.01); H03F 2200/372 (2013.01); H03F 2203/45112 (2013.01); H03F 2203/45116 (2013.01); H03F 2203/45402 (2013.01); H03F 2203/45408 (2013.01); H03F 2203/45631 (2013.01); H03F 2203/45702 (2013.01);
Abstract

A preamplifier includes a differential pair of transistors receiving a bias current having a differential input and a differential output, a first resistor coupled to a first differential output node, a first transistor having a current path coupled between the first resistor and a power supply, a second resistor coupled to the first differential output node, a second transistor having a current path coupled between the second resistor and the power supply, a third resistor coupled to a second differential output node, a third transistor having a current path coupled between the third resistor and the power supply, a fourth resistor coupled to the second differential output node, and a fourth transistor having a current path coupled between the fourth resistor and the power supply, wherein a source of the second and third transistors are coupled together.


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