The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 08, 2016

Filed:

Jan. 09, 2013
Applicant:

Kabushiki Kaisha Toshiba, Tokyo, JP;

Inventors:

Hiroshi Ohno, Yokohama, JP;

Osamu Fujii, Yokohama, JP;

Masataka Shiratsuchi, Kawasaki, JP;

Yoshinori Honguh, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/00 (2006.01); H01J 40/14 (2006.01); H01L 27/146 (2006.01); H04N 5/335 (2011.01); H04N 5/369 (2011.01);
U.S. Cl.
CPC ...
H01L 27/14601 (2013.01); H01L 27/146 (2013.01); H01L 27/1463 (2013.01); H01L 27/14683 (2013.01); H04N 5/335 (2013.01); H04N 5/369 (2013.01); H01L 27/14643 (2013.01);
Abstract

According to one embodiment, an image sensor includes an image-sensing element region formed by arranging a plurality of image-sensing elements on a semiconductor substrate and element isolation portions formed to isolate the image-sensing elements, and a logic circuit region formed in a region different from the image-sensing element region on the substrate and including a plurality of gate patterns. Further, dummy element isolation portions are arranged with a constant pitch in the boundary region between the image-sensing element region and the logic circuit region.


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