The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 08, 2016
Filed:
Nov. 20, 2012
Applicant:
Robert Bosch Gmbh, Stuttgart, DE;
Inventors:
Assignee:
Robert Bosch GmbH, Stuttgart, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 21/768 (2006.01); H01L 23/495 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 21/768 (2013.01); H01L 24/27 (2013.01); H01L 24/32 (2013.01); H01L 24/33 (2013.01); H01L 24/36 (2013.01); H01L 24/37 (2013.01); H01L 24/40 (2013.01); H01L 23/49513 (2013.01); H01L 23/49524 (2013.01); H01L 24/29 (2013.01); H01L 2224/26145 (2013.01); H01L 2224/27013 (2013.01); H01L 2224/29101 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/33181 (2013.01); H01L 2224/352 (2013.01); H01L 2224/371 (2013.01); H01L 2224/37012 (2013.01); H01L 2224/40245 (2013.01); H01L 2224/49171 (2013.01); H01L 2924/1305 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13091 (2013.01);
Abstract
The invention relates to a method for making contact with a semiconductor (), and to a contact arrangement () for a semiconductor (), wherein the semiconductor () is a really connected to a first contact partner () at at least one first area by the formation of a first soldering layer () having a predefined thickness. According to the invention, a polyimide layer () is applied as delimiting means on the semiconductor (), said polyimide layer predefining the dimensions and/or the form of at least one soldering area () of the semiconductor ().