The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 08, 2016

Filed:

May. 28, 2015
Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventors:

Sung Wook Jung, Gyeonggi-do, KR;

Ji Hui Baek, Gyeonggi-do, KR;

Dong Hun Lee, Gyeonggi-do, KR;

Tae Hwa Lee, Gyeonggi-do, KR;

Hye Eun Heo, Gyeonggi-do, KR;

Assignee:

SK Hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01); H01L 21/311 (2006.01); H01L 21/4757 (2006.01); H01L 27/115 (2006.01);
U.S. Cl.
CPC ...
H01L 21/47573 (2013.01); H01L 27/11521 (2013.01); H01L 27/11556 (2013.01); H01L 27/11568 (2013.01); H01L 27/11582 (2013.01);
Abstract

A method of manufacturing a semiconductor memory device includes forming a first attached layer on a substrate, forming a stack layer on the first attached layer, separating the stack layer and the first attached layer from each other, forming vertical holes by performing a first etch process on the stack layer in a direction from bottom to top, removing the first attached layer, attaching the stack layer in which the vertical holes are formed to the substrate, and performing a second etch process so that each of the vertical holes has a uniform width.


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