The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 08, 2016
Filed:
Nov. 19, 2012
Applicant:
Nvidia Corporation, Santa Clara, CA (US);
Inventors:
Assignee:
NVIDIA Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/12 (2006.01); G11C 11/418 (2006.01); G11C 8/08 (2006.01); G11C 11/417 (2006.01); G11C 11/408 (2006.01); G11C 11/4091 (2006.01);
U.S. Cl.
CPC ...
G11C 11/418 (2013.01); G11C 7/12 (2013.01); G11C 8/08 (2013.01); G11C 11/417 (2013.01); G11C 11/4085 (2013.01); G11C 11/4091 (2013.01); Y02B 60/1225 (2013.01);
Abstract
A static read-only memory (SRAM) includes one or more bit cell rows that each includes a collection of bit cells. Each bit cell row is coupled to two or more different wordlines, where each wordline associated with a given bit cell row provides memory access to a different subset of bit cells within that bit cell row.
Huang, Yongchang. (2016). Technique for optimizing static random-access memory passive power consumption (U.S. Patent No. 9281054). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9281054
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile