The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 08, 2016
Filed:
Oct. 28, 2014
Applicant:
Xilinx, Inc., San Jose, CA (US);
Inventors:
Terence J. Magee, San Francisco, CA (US);
Jayant Mittal, San Jose, CA (US);
Assignee:
XILINX, INC., San Jose, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 11/409 (2006.01); G11C 11/4076 (2006.01); G11C 7/22 (2006.01);
U.S. Cl.
CPC ...
G11C 11/409 (2013.01); G11C 11/4076 (2013.01); G11C 7/22 (2013.01);
Abstract
Systems, devices, and circuits for source-synchronous memory interfaces are disclosed. For example, a device includes a first NAND gate with an input for receiving a serial mode enable signal. In addition, the device also includes a second NAND gate with an input for receiving a forwarded strobe signal and an input for receiving an output of the first NAND gate. The device also includes a third NAND gate with an input for receiving a data strobe signal, and an XNOR gate with an input for receiving an output of the second NAND gate and an input for receiving an output of the third NAND gate.