The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 08, 2016

Filed:

Jun. 11, 2014
Applicant:

Nec Corporation, Minato-ku, Tokyo, JP;

Inventor:

Shusaku Uchibori, Tokyo, JP;

Assignee:

NEC CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5027 (2013.01);
Abstract

A circuit verifying apparatus, which calculates code coverage of a measurement-target logic circuit written in a hardware description language, including: a coverage observing unit which measures whether a code corresponding to a measurement-target signal extracted from each of plural observation points, which are arranged inside the measurement-target logic circuit, is carried out or not; and a coverage collecting unit which collects measurement results acquired by the coverage observing unit, and measures quantitatively a ratio of tested codes to whole codes which describe the measurement-target logic circuit, and outputs the ratio.


Find Patent Forward Citations

Uchibori, Shusaku. (2016). Circuit verifying apparatus, circuit verifying method, and circuit verifying program (U.S. Patent No. 9280622). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9280622

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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