The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 01, 2016
Filed:
Jan. 18, 2012
Wayne L. Moul, Loveland, CO (US);
Robert J. Behnke, Ii, Erie, CO (US);
Scott E. M. Frushour, Boulder, CO (US);
Jeffrey L. Jensen, Boulder, CO (US);
Wayne L. Moul, Loveland, CO (US);
Robert J. Behnke, II, Erie, CO (US);
Scott E. M. Frushour, Boulder, CO (US);
Jeffrey L. Jensen, Boulder, CO (US);
Covidien LP, Mansfield, MA (US);
Abstract
A method of manufacturing a printed circuit board includes the initial steps of providing a first layer stack and providing a second layer stack. The first layer stack includes a first electrically-insulating layer. The first electrically-insulating layer includes a first surface and one or more electrically-conductive traces disposed on the first surface. The second layer stack includes a second electrically-insulating layer and a first electrically-conductive layer. The second electrically-insulating layer includes a first surface and an opposite second surface. The first electrically-conductive layer is disposed on the first surface of the second electrically-insulating layer. The second layer stack further includes a cut-out area defining a void that extends therethrough. The cut-out area is configured to receive therein at least a portion of a device to be coupled to the first surface of the first electrically-insulating layer and electrically-coupled to one or more of the one or more electrically-conductive traces.