The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9276586 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 01, 2016

Filed:

Oct. 23, 2013
Applicant:

Renesas Electronics Corporation, Kawasaki-shi, JP;

Inventor:

Tomoki Yasukawa, Kawasaki, JP;

Assignee:

Renesas Electronics Corporation, Kawasaki-Shi, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/00 (2006.01); H03K 5/135 (2006.01);
U.S. Cl.
CPC ...
H03L 7/00 (2013.01); H03K 5/135 (2013.01);
Abstract

A frequency error calculator circuit calculates the frequency error in a basic clock based on the basic clock and on a reference clock having a frequency higher than the basic clock. An operation clock generator circuit outputs an operation clock whose error has been corrected based on the frequency error calculated by the frequency error calculator circuit. An ON/OFF control circuit outputs an ON/OFF control signal that specifies the calculation timing that the frequency error calculator circuit calculates the frequency error of the basic clock based on the frequency error calculated by the frequency error calculator circuit.


Find Patent Forward Citations

Yasukawa, Tomoki. (2016). Semiconductor device and clock correction method (U.S. Patent No. 9276586). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9276586

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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