The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 01, 2016

Filed:

Nov. 09, 2009
Applicants:

Sung-jin Whang, Gyeonggi-do, KR;

Moon-sig Joo, Gyeonggi-do, KR;

Yong-seok Eun, Gyeonggi-do, KR;

Kwon Hong, Gyeonggi-do, KR;

Bo-min Seo, Gyeonggi-do, KR;

Kyoung-eun Chang, Gyeonggi-do, KR;

Seung-woo Shin, Gyeonggi-do, KR;

Inventors:

Sung-Jin Whang, Gyeonggi-do, KR;

Moon-Sig Joo, Gyeonggi-do, KR;

Yong-Seok Eun, Gyeonggi-do, KR;

Kwon Hong, Gyeonggi-do, KR;

Bo-Min Seo, Gyeonggi-do, KR;

Kyoung-Eun Chang, Gyeonggi-do, KR;

Seung-Woo Shin, Gyeonggi-do, KR;

Assignee:

Hynix Semiconductor Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 21/28 (2006.01); H01L 27/108 (2006.01); H01L 27/115 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823443 (2013.01); H01L 21/28052 (2013.01); H01L 21/28114 (2013.01); H01L 27/10873 (2013.01); H01L 27/11521 (2013.01); H01L 27/11568 (2013.01); H01L 29/42376 (2013.01); H01L 29/4933 (2013.01);
Abstract

A method for fabricating a semiconductor device, including forming gate patterns over a substrate, forming conductive layer covering top and sidewalls of each gate pattern, forming a metal layer for a silicidation process over the conductive layer, and silicifying the conductive layer and the gate patterns using the metal layer.


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