The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 01, 2016
Filed:
Mar. 19, 2012
Applicant:
Esko O. Mikkola, Tucson, AZ (US);
Inventor:
Esko O. Mikkola, Tucson, AZ (US);
Assignee:
Ridgetop Group, Inc., Tucson, AZ (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 11/22 (2006.01); G06F 11/00 (2006.01); G01R 31/28 (2006.01); G06F 19/00 (2011.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
G06F 19/00 (2013.01); G01R 31/2884 (2013.01); H01L 22/34 (2013.01); B01L 2300/0825 (2013.01); G06F 19/3418 (2013.01);
Abstract
A test chip, system and method for testing large numbers of test devices on a single test chip decreases the time and complexity required to characterize the variation and reliability of the IC fabrication process. A remotely configurable test chip can be programmed with varying bias conditions for testing of process variation or numerous failure modes on large sample sizes. An on-chip addressing technique allows large numbers of test devices to be tested simultaneously and the measurement signals read out serially for different test devices. The test chip may be configured for wafer, die or package-level testing.