The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 01, 2016

Filed:

Sep. 30, 2014
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

John J. Ellis-Monaghan, Grand Isle, VT (US);

William M. J. Green, Astoria, NY (US);

Jens Hofrichter, Gattikon, CH;

Marwan H. Khater, Astoria, NY (US);

Jessie C. Rosenberg, Mount Vernon, NY (US);

Steven M. Shank, Jericho, VT (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B 6/34 (2006.01); G02B 6/132 (2006.01); G02B 6/30 (2006.01); G02B 6/12 (2006.01);
U.S. Cl.
CPC ...
G02B 6/34 (2013.01); G02B 6/132 (2013.01); G02B 6/30 (2013.01); G02B 2006/12107 (2013.01);
Abstract

Disclosed are optoelectronic integrated circuit structures that incorporate a first optical waveguide, having a semiconductor core, indirectly coupled to a grating coupler through a second optical waveguide, having a dielectric core, in order provide a relatively large alignment tolerance. The dielectric core can comprise multiple dielectric layers above one end of the semiconductor core and extending laterally over an isolation region adjacent to that end. The grating coupler can include dielectric fins above the isolation region. Alternatively, the grating coupler can include semiconductor fins within the isolation region. Also disclosed herein are methods of forming such optoelectronic integrated circuit structures that can be readily integrated with complementary metal oxide semiconductor (CMOS) device processing and germanium photodetector processing.


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