The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 23, 2016

Filed:

May. 02, 2013
Applicant:

Semiconductor Components Industries, Llc, Phoenix, AZ (US);

Inventors:

Honghong Peng, San Jose, CA (US);

Brian Keelan, Boulder Creek, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04N 5/353 (2011.01); H04N 5/357 (2011.01); H04N 5/3745 (2011.01); H01L 27/146 (2006.01); H04N 5/232 (2006.01);
U.S. Cl.
CPC ...
H04N 5/353 (2013.01); H01L 27/14634 (2013.01); H04N 5/23277 (2013.01); H04N 5/357 (2013.01); H04N 5/3535 (2013.01); H04N 5/3745 (2013.01); H04N 5/2327 (2013.01);
Abstract

Imaging systems may be provided with stacked-chip image sensors. A stacked-chip image sensor may include a vertical chip stack that includes an array of image pixels and processing circuitry. The image pixel array may be coupled to the processing circuitry through an array of vertical metal interconnects. The image pixel array may be partitioned into image pixel sub-arrays configured to capture image data using one or more integration times. The processing circuitry may determine motion information for the image data captured by each pixel sub-array and may determine integration times for each pixel sub-array. The pixel sub-arrays may capture additional image data using the determined integration times. The additional image data may be combined to generate final image frames having short integration pixel values and long integration pixel values. The processing circuitry may output the final image frames to off-chip image processing circuitry.


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